Issued Patents 2025
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12413213 | Efficient clocking structures for high-speed systems using hybrid digital delay lanes | Jitendra Kumar Yadav, Sachin Ramesh Gugwad, Hari Anand Ravi | 2025-09-09 |
| 12309008 | Passive equalization circuit | Vinod Kumar, Phalguni Bala | 2025-05-20 |