Issued Patents 2024
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170118 | Memory system | Shunichi Igahara, Toshikatsu Hida | 2024-12-17 |
| 12159061 | Memory system including a non-volatile memory chip and method for controlling the non-volatile memory chip | Marie Grace Izabelle Angeles Sia, Suguru NISHIKAWA, Riki Suzuki | 2024-12-03 |
| 12094541 | Memory system | Tsukasa Tokutomi, Masanobu Shirakawa, Kengo Kurose, Marie Takada, Ryo Yamaki +1 more | 2024-09-17 |
| 12086439 | Memory storage with selected performance mode | Shunichi Igahara, Toshikatsu Hida, Riki Suzuki, Takehiko Amaki, Suguru NISHIKAWA | 2024-09-10 |
| 12050812 | Memory system and method for managing number of read operations using two counters | Suguru NISHIKAWA, Takehiko Amaki | 2024-07-30 |
| 12046300 | Memory system | TOMOYA KAMATA, Suguru NISHIKAWA | 2024-07-23 |
| 12033705 | Memory system, control method thereof, and program | — | 2024-07-09 |
| 12029031 | Memory system | Takehiko Amaki, Toshikatsu Hida, Marie Grace Izabelle Angeles Sia, Riki Suzuki, Shohei Asami | 2024-07-02 |
| 11954357 | Memory system and memory system control method | Takehiko Amaki, Shunichi Igahara, Toshikatsu Hida, Riki Suzuki | 2024-04-09 |
| 11947400 | Memory system and controller | Katsuhiko Ueki | 2024-04-02 |
| 11941251 | Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory | Masanobu Shirakawa, Kiyotaka Iwasaki | 2024-03-26 |
| 11915759 | Memory system for restraining threshold variation to improve data reading | Masanobu Shirakawa, Marie Takada, Tsukasa Tokutomi, Kiichi Tachi | 2024-02-27 |
| 11909415 | Memory system | Masahiro Kiyooka, Riki Suzuki | 2024-02-20 |
| 11869596 | Memory system including a semiconductor memory having a memory cell and a write circuit configured to write data to the memory cell | Suguru NISHIKAWA, Riki Suzuki, Masanobu Shirakawa, Toshikatsu Hida | 2024-01-09 |