Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12074607 | Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options | Narasimhan Rajagopal, Nithin Gopinath, Viswanathan Nagarajan, Neeraj Shrivastava, Visvesvaraya Pentakota +1 more | 2024-08-27 |
| 11881867 | Calibration scheme for filling lookup table in an ADC | Narasimhan Rajagopal, Eeshan Miglani, Chirag Chandrahas Shetty, Neeraj Shrivastava, Shagun Dusad +8 more | 2024-01-23 |