Issued Patents 2024
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12146912 | Clock gating circuits and methods for dual-edge-triggered applications | Gokul Sabada, Madhavan Sainath Rao Pissay, Badarish Mohan Subbannavar | 2024-11-19 |
| 11946973 | Hold time improved low area flip-flop architecture | Badarish Mohan Subbannavar, Madhavan Sainath Rao Pissay | 2024-04-02 |
| 11916555 | Flip-flop with internal circuit for generating inflated low and high pulse width signals | Badarish Mohan Subbannavar, Gokul Sabada | 2024-02-27 |