Issued Patents 2024
Showing 1–25 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12183652 | Integrated circuit structure | — | 2024-12-31 |
| 12183791 | Integrated circuit structure | — | 2024-12-31 |
| 12184283 | Semiconductor device for logic and memory co-optimization | — | 2024-12-31 |
| 12183735 | Semiconductor devices and methods of manufacture | Ta-Chun Lin, Kuo-Hua Pan | 2024-12-31 |
| 12176411 | Semiconductor device with isolation transistors and back side voltage metal lines | — | 2024-12-24 |
| 12159913 | Contact structures for gate-all-around devices and methods of forming the same | — | 2024-12-03 |
| 12159872 | IC including standard cells and SRAM cells | — | 2024-12-03 |
| 12154959 | Gate-all-around structures and manufacturing method thereof | — | 2024-11-26 |
| 12148463 | Dual port memory cell with multiple metal layers | — | 2024-11-19 |
| 12136571 | Methods for fabricating FinFETs having different fin numbers and corresponding FinFETs thereof | — | 2024-11-05 |
| 12127387 | Gate-all-around high-density and high-speed SRAM cells | — | 2024-10-22 |
| 12119379 | Gate all around transistors with different threshold voltages | — | 2024-10-15 |
| 12114473 | Three-port SRAM cell and layout method | — | 2024-10-08 |
| 12106801 | Circuit for reducing voltage degradation caused by parasitic resistance in a memory device | — | 2024-10-01 |
| 12108586 | Two-port SRAM structure | — | 2024-10-01 |
| 12100628 | Interconnect structure for fin-like field effect transistor | — | 2024-09-24 |
| 12094953 | Semiconductor manufacturing | — | 2024-09-17 |
| 12089389 | Conductive layers with different thicknesses | — | 2024-09-10 |
| 12089390 | Cell manufacturing | — | 2024-09-10 |
| 12089391 | Semiconductor device | — | 2024-09-10 |
| 12080607 | Structure and method for FinFET device with source/drain modulation | Ta-Chun Lin, Kuo-Hua Pan | 2024-09-03 |
| 12082389 | Integrated circuit with embedded high-density and high-current SRAM macros | — | 2024-09-03 |
| 12074057 | Isolation structures | Ta-Chun Lin, Kuo-Hua Pan | 2024-08-27 |
| 12057487 | Memory chip structure having GAA transistors with different threshold voltages and work functions for improving performances in multiple applications | — | 2024-08-06 |
| 12051695 | Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same | Ta-Chun Lin, Kuo-Hua Pan, Shien-Yang Wu | 2024-07-30 |