Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12112108 | Method to compute timing yield and yield bottleneck using correlated sample generation and efficient statistical simulation | Jiayong Le, Li Ding | 2024-10-08 |
| 11893332 | Global mistracking analysis in integrated circuit design | Li Ding | 2024-02-06 |