Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12174714 | System and method for processor debug using low-bandwidth interface with configurable list of skip and loop instructions | Rakesh Kumar POLASA, Vinay Patel, Shubham Paliwal | 2024-12-24 |
| 12092690 | Emulation of JTAG/SCAN test interface protocols using SPI communication device | Rakesh Kumar POLASA | 2024-09-17 |