| 12181971 |
Symbol rotation of cache line codewords for increased reliability with metadata |
Majid Anaraki Nemati, Srikanth Dakshinamoorthy, Anthony Dwayne Weathers |
2024-12-31 |
| 12169459 |
Method and apparatus for data access in a heterogeneous processing system with multiple processors using memory extension operation |
Arnav GOEL, Neal SANGHVI, Jiayu Bai, Qi ZHENG |
2024-12-17 |
| 12160237 |
Integrated circuit with output driver that compensates for supply voltage variations |
Kailash Kumar |
2024-12-03 |
| 12088085 |
Overvoltage protection circuit for a PMOS based switch |
Manoj Kumar, Nicolas Demange |
2024-09-10 |
| 12008417 |
Interconnect-based resource allocation for reconfigurable processors |
Raghunath Shenbagam |
2024-06-11 |
| 11893424 |
Training a neural network using a non-homogenous set of reconfigurable processors |
Martin Russell Raumann, Qi ZHENG, Bandish B. Shah, Kin Hing Leung, Sumti Jairath +1 more |
2024-02-06 |
| 11886930 |
Runtime execution of functions across reconfigurable processor |
Ram Sivaramakrishnan, Sumti Jairath, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar +8 more |
2024-01-30 |
| 11886931 |
Inter-node execution of configuration files on reconfigurable processors using network interface controller (NIC) buffers |
Ram Sivaramakrishnan, Sumti Jairath, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar +8 more |
2024-01-30 |
