Issued Patents 2024
Showing 25 most recent of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164447 | Off-module data buffer | Christopher Haywood | 2024-12-10 |
| 12148462 | High capacity memory system using standard controller component | Suresh Rajan, Scott C. Best | 2024-11-19 |
| 12147362 | Deterministic operation of storage class memory | Brent Haukness | 2024-11-19 |
| 12135645 | Nonvolatile physical memory with DRAM cache | John Eric Linstadt, Christopher Haywood | 2024-11-05 |
| 12130757 | Memory module with reduced read/write turnaround overhead | Craig E. Hampel | 2024-10-29 |
| 12130703 | Memory component with error-detect-correct code interface | Brent Haukness, Lawrence Lai | 2024-10-29 |
| 12130759 | Protocol including timing calibration between memory request and data transfer | Holden D. Jessup | 2024-10-29 |
| 12119819 | Power-up switch-interconnect configuration | Robert Fu | 2024-10-15 |
| 12119042 | Low-power source-synchronous signaling | Jared L. Zerbe | 2024-10-15 |
| 12111723 | Memory repair method and apparatus based on error code tracking | Ely Tsern | 2024-10-08 |
| 12105975 | Adjustable access energy and access latency memory system and devices | John Eric Linstadt | 2024-10-01 |
| 12094565 | Memory component with adjustable core-to-interface data rate ratio | Ely Tsern | 2024-09-17 |
| 12086039 | High performance persistent memory | J. James Tringali, Ely Tsern | 2024-09-10 |
| 12079135 | Techniques for storing data and tags in different memory arrays | — | 2024-09-03 |
| 12072802 | Hybrid memory module | — | 2024-08-27 |
| 12072807 | Storage and access of data and tags in a multi-way set associative cache | Thomas Vogelsang, Michael Raymond Miller, Collins Williams | 2024-08-27 |
| 12066957 | Interface for memory readout from a memory component in the event of fault | Kenneth L. Wright | 2024-08-20 |
| 12050513 | Energy-efficient error-correction-detection storage | John Eric Linstadt, Liji Gopalakrishnan | 2024-07-30 |
| 12032845 | Memory controller partitioning for hybrid memory system | John Eric Linstadt | 2024-07-09 |
| 12026038 | Memory controller with error detection and retry modes of operation | Ely Tsern, Mark A. Horowitz | 2024-07-02 |
| 12015428 | MAC processing pipeline using filter weights having enhanced dynamic range, and methods of operating same | Cheng C. Wang | 2024-06-18 |
| 12014089 | High capacity, high performance memory system | — | 2024-06-18 |
| 12008066 | Mac processing pipeline having conversion circuitry, and methods of operating same | Cheng C. Wang | 2024-06-11 |
| 12002532 | Command/address channel error detection | John Eric Linstadt | 2024-06-04 |
| 11994930 | Optimizing power in a memory device | Dinesh Patil, Amir Amirkhany, Farrukh Aquil, Kambiz Kaviani | 2024-05-28 |