Issued Patents 2024
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176029 | Drift aware read operations | Nevil N. Gajera, Lingming Yang, John F. Schreck | 2024-12-24 |
| 12106803 | Multi-step pre-read for write operations in memory devices | Yen-Chun Lee, Nevil N. Gajera | 2024-10-01 |
| 12101946 | Integrated assemblies comprising hydrogen diffused within two or more different semiconductor materials, and methods of forming integrated assemblies | Kamal M. Karda, Yi Fang Lee, Haitao Liu, Durai Vishak Nirmal Ramaswamy, Ramanathan Gandhi +2 more | 2024-09-24 |
| 12080359 | Identify the programming mode of memory cells during reading of the memory cells | Fabio Pellizzer, Nevil N. Gajera | 2024-09-03 |
| 12080331 | Memory device having 2-transistor vertical memory cell and shield structures | Kamal M. Karda, Haitao Liu, Durai Vishak Nirmal Ramaswamy, Alessandro Calderoni, Richard E. Fackenthal +1 more | 2024-09-03 |
| 12069853 | Memory device having shared access line for 2-transistor vertical memory cell | Kamal M. Karda, Durai Vishak Nirmal Ramaswamy, Haitao Liu | 2024-08-20 |
| 12014784 | Evaluation of background leakage to select write voltage in memory devices | Nevil N. Gajera, Zhongyuan Lu | 2024-06-18 |
| 11985806 | Vertical 2-transistor memory cell | Kamal M. Karda, Srinivas Pulugurtha, Haitao Liu, Durai Vishak Nirmal Ramaswamy | 2024-05-14 |
| 11950426 | Memory device having 2-transistor vertical memory cell and wrapped data line structure | Kamal M. Karda, Eric Carman, Durai Vishak Nirmal Ramaswamy, Richard E. Fackenthal, Haitao Liu | 2024-04-02 |
| 11950402 | Memory device having 2-transistor vertical memory cell and shield structures | Kamal M. Karda, Haitao Liu, Durai Vishak Nirmal Ramaswamy | 2024-04-02 |
| 11942136 | Memory device having shared read/write access line for 2-transistor vertical memory cell | Kamal M. Karda, Durai Vishak Nirmal Ramaswamy | 2024-03-26 |
| 11942139 | Performing refresh operations on memory cells | Lingming Yang, Nevil N. Gajera, John Christopher Sancon | 2024-03-26 |
| 11923007 | Dirty write on power off | Fabio Pellizzer, Jessica Chen, Nevil N. Gajera | 2024-03-05 |
| 11894078 | Accessing a multi-level memory cell | Xuan Anh Tran, Jessica Chen, Jason A. Durand, Nevil N. Gajera, Yen-Chun Lee | 2024-02-06 |
| 11875867 | Weighted wear leveling for improving uniformity | Zhongyuan Lu, Nevil N. Gajera | 2024-01-16 |
| 11871589 | Memory device having 2-transistor memory cell and access line plate | Kamal M. Karda, Haitao Liu, Durai Vishak Nirmal Ramaswamy | 2024-01-09 |
| 11862226 | Systems and methods for pre-read scan of memory devices | Fabio Pellizzer, Nevil N. Gajera, Yen-Chun Lee, Ferdinando Bedeschi | 2024-01-02 |