Issued Patents 2024
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182413 | Area-optimized row hammer mitigation | Sujeet Ayyapureddi, Yang Lu, Edmund J. Gieske, Cagdas Dirik, Ameen D. Akel +3 more | 2024-12-31 |
| 12131071 | Row hammer telemetry | Anandhavel Nagendrakumar, Mohammed Ebrahim Hargan, Scott Garner, Danilo Caraccio, Daniele Balluchi +2 more | 2024-10-29 |
| 12119043 | Practical and efficient row hammer error detection | Edmund J. Gieske, Sujeet Ayyapureddi, Yang Lu | 2024-10-15 |
| 12105658 | Intra-chip and inter-chip data protection | Pramod BHARDWAJ, Sarosh I. Azad, Wern-Yan Koe | 2024-10-01 |
| 12067270 | Memory device security and row hammer mitigation | Yang Lu, Sujeet Ayyapureddi, Edmund J. Gieske, Cagdas Dirik, Ameen D. Akel +3 more | 2024-08-20 |
| 12032443 | Shadow DRAM with CRC+RAID architecture, system and method for high RAS feature in a CXL drive | Sandeep Krishna Thirumala, Lingming Yang, Nevil N. Gajera | 2024-07-09 |
| 12019516 | Instant write scheme with delayed parity/raid | Lingming Yang, Sandeep Krishna Thirumala, Nevil N. Gajera | 2024-06-25 |
| 12013756 | Method and memory system for writing data to dram submodules based on the data traffic demand | Lingming Yang, Sandeep Krishna Thirumala, Nevil N. Gajera | 2024-06-18 |
| 11996336 | Electron beam probing techniques and related structures | Radhakrishna Kotti, Mallesh Rajashekharaiah | 2024-05-28 |
| 11961556 | Socket design for a memory device | Radhakrishna Kotti, Rajasekhar Venigalla | 2024-04-16 |
| 11869178 | System for predicting properties of structures, imager system, and related methods | Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted Taylor +2 more | 2024-01-09 |
| 11860228 | Integrated circuit chip testing interface with reduced signal wires | Albert Shih-Huai Lin, Niravkumar Patel, Jane W. Sowards | 2024-01-02 |