ME

Masatomo Eimitsu

Kioxia: 2 patents #147 of 963Top 20%
Overall (2024): #140,242 of 561,600Top 25%
2
Patents 2024

Issued Patents 2024

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12040806 Semiconductor integrated circuit, phase locked loop (PLL) circuit, and system — 2024-07-16
11979162 Semiconductor device, reception device, and memory controller — 2024-05-07