Issued Patents 2024
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176284 | Through plate interconnect for a vertical MIM capacitor | Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Shem Ogadhoh +6 more | 2024-12-24 |
| 12150297 | Thin film transistors having a backside channel contact for high density memory | Noriyuki Sato, Sarah Atanasov, Abhishek A. Sharma, Bernhard Sell, Chieh-Jen Ku +6 more | 2024-11-19 |
| 12080643 | Integrated circuit structures having differentiated interconnect lines in a same dielectric layer | Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate Vinasco, Chieh-Jen Ku, Shem Ogadhoh +6 more | 2024-09-03 |
| 12080781 | Fabrication of thin film fin transistor structure | Noriyuki Sato, Sarah Atanasov, Abhishek A. Sharma, Bernhard Sell, Chieh-Jen Ku +6 more | 2024-09-03 |
| 11991873 | Capacitor separations in dielectric layers | Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Jack T. Kavalieros +13 more | 2024-05-21 |
| 11955560 | Passivation layers for thin film transistors and methods of fabrication | Abhishek A. Sharma, Arnab Sen Gupta, Travis W. Lajoie, Sarah Atanasov, Chieh-Jen Ku +5 more | 2024-04-09 |
| 11950407 | Memory architecture with shared bitline at back-end-of-line | Juan G. Alzate Vinasco, Travis W. Lajoie, Abhishek A. Sharma, Kimberly Pierce, Elliot N. Tan +3 more | 2024-04-02 |
| 11929415 | Thin film transistors with offset source and drain structures and process for forming such | Chieh-Jen Ku, Bernhard Sell, Travis W. Lajoie | 2024-03-12 |
| 11908911 | Thin film transistors with raised source and drain contacts and process for forming such | Chieh-Jen Ku, Bernhard Sell | 2024-02-20 |