Issued Patents 2024
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12118360 | Branch target buffer miss handling | John G. Favor | 2024-10-15 |
| 12106111 | Prediction unit with first predictor that provides a hashed fetch address of a current fetch block to its own input and to a second predictor that uses it to predict the fetch address of a next fetch block | John G. Favor | 2024-10-01 |
| 12020032 | Prediction unit that provides a fetch block descriptor each clock cycle | John G. Favor | 2024-06-25 |
| 12014178 | Folded instruction fetch pipeline | John G. Favor, Vihar Soneji | 2024-06-18 |
| 12014180 | Dynamically foldable and unfoldable instruction fetch pipeline | John G. Favor, Vihar Soneji | 2024-06-18 |
| 12008375 | Branch target buffer that stores predicted set index and predicted way number of instruction cache | John G. Favor, Vihar Soneji | 2024-06-11 |