Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125540 | Write latency and energy using asymmetric cell design | Innocenzo Tortorelli | 2024-10-22 |
| 12073881 | Techniques for programming multi-level self-selecting memory cell | — | 2024-08-27 |
| 12033695 | Techniques for multi-level chalcogenide memory cell programming | Innocenzo Tortorelli, Alessandro Sebastiani, Matteo Impalà | 2024-07-09 |
| 12014779 | Programming techniques for polarity-based memory cells | Innocenzo Tortorelli, Mattia Boniardi | 2024-06-18 |
| 11996141 | Reading a multi-level memory cell | Fabio Pellizzer, Innocenzo Tortorelli, Agostino Pirovano | 2024-05-28 |
| 11942183 | Adaptive write operations for a memory device | Mattia Boniardi, Richard K. Dodge, Innocenzo Tortorelli, Mario Allegra | 2024-03-26 |
| 11887661 | Cross-point pillar architecture for memory arrays | Innocenzo Tortorelli, Fabio Pellizzer, Alessandro Sebastiani | 2024-01-30 |