| 12181521 |
At-speed test access port operations |
— |
2024-12-31 |
| 12164001 |
3D tap and scan port architectures |
— |
2024-12-10 |
| 12163998 |
TSV testing |
— |
2024-12-10 |
| 12154835 |
Scan testable through silicon VIAs |
— |
2024-11-26 |
| 12153090 |
Commanded JTAG test access port operations |
— |
2024-11-26 |
| 12146909 |
Selectable JTAG or trace access with data store and output |
— |
2024-11-19 |
| 12130328 |
Interface to full and reduced pin JTAG devices |
— |
2024-10-29 |
| 12117490 |
Scan frame based test access mechanisms |
— |
2024-10-15 |
| 12092687 |
Selectable JTAG or trace access with data store and output |
— |
2024-09-17 |
| 12050247 |
Addressable test access port |
— |
2024-07-30 |
| 12025649 |
Integrated circuit die test architecture |
— |
2024-07-02 |
| 12013434 |
Programmable test compression architecture input/output shift register coupled to SCI/SCO/PCO |
— |
2024-06-18 |
| 12007441 |
3D stacked die test architecture |
— |
2024-06-11 |
| 11965930 |
Test compression in a JTAG daisy-chain environment |
— |
2024-04-23 |
| 11906582 |
Shadow access port method and apparatus |
— |
2024-02-20 |
| 11879941 |
Scan testing using scan frames with embedded commands |
— |
2024-01-23 |
| 11867756 |
Reduced signaling interface method and apparatus |
— |
2024-01-09 |
| 11860224 |
Interposer instrumentation method and apparatus |
— |
2024-01-02 |