Issued Patents 2024
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12175179 | Assessing performance of a hardware design using formal evaluation logic | Ashish Darbari | 2024-12-24 |
| 12093621 | Detecting out-of-bounds violations in a hardware design using formal verification | Ashish Darbari | 2024-09-17 |
| 12050849 | Livelock detection in a hardware design using formal evaluation logic | Ashish Darbari | 2024-07-30 |
| 11948652 | Formal verification tool to verify hardware design of memory unit | Ashish Darbari | 2024-04-02 |