Issued Patents 2024
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176254 | PID test structure and semiconductor test structure | — | 2024-12-24 |
| 12150293 | Bit line structure, manufacturing method thereof and semiconductor memory | — | 2024-11-19 |
| 12119286 | Die, memory and method of manufacturing die | — | 2024-10-15 |
| 12100594 | Active region array formation method | — | 2024-09-24 |
| 12087581 | Active region, active region array and formation method thereof | — | 2024-09-10 |
| 12062610 | Method for forming semiconductor structure and semiconductor structure | — | 2024-08-13 |
| 12046552 | Anti-fuse unit and anti-fuse array | — | 2024-07-23 |
| 12040376 | Semiconductor device and preparation method thereof | — | 2024-07-16 |
| 12040220 | Semiconductor device | — | 2024-07-16 |
| 11988704 | Test circuits and semiconductor test methods | — | 2024-05-21 |
| 11990340 | Semiconductor device and method of manufacturing the same | — | 2024-05-21 |
| 11984369 | Semiconductor structure | — | 2024-05-14 |
| 11985818 | Anti-fuse devices and anti-fuse units | — | 2024-05-14 |
| 11985813 | Bit line lead-out structure and preparation method therefor | — | 2024-05-14 |
| 11984505 | MOSFET devices and manufacturing methods thereof | — | 2024-05-14 |
| 11916044 | Semiconductor structure and manufacturing method thereof | — | 2024-02-27 |
| 11894363 | Semiconductor device with a doped well region | — | 2024-02-06 |
| 11888474 | On die termination circuit and memory device | — | 2024-01-30 |
| 11869608 | Anti-fuse unit and anti-fuse array | — | 2024-01-09 |
| 11860217 | Test circuits and semiconductor test methods | — | 2024-01-02 |
| 11864375 | Memory and method for manufacturing same | — | 2024-01-02 |
| 11862281 | Word line lead-out structure and method for preparing same | — | 2024-01-02 |