KS

Keyliane da Silva Fernandes Silvano

CS Cadence Design Systems: 1 patents #31 of 141Top 25%
📍 Belo Horizonte, BR: #3 of 23 inventorsTop 15%
Overall (2024): #561,455 of 561,600Top 100%
1
Patents 2024

Issued Patents 2024

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11892504 Method and system for debugging metastability in digital circuits Alberto Arias Drake, Bijitendra Mittra 2024-02-06