VT

Vivek Trivedi

AL Astera Labs: 1 patents #10 of 13Top 80%
📍 Fremont, CA: #749 of 1,881 inventorsTop 40%
🗺 California: #26,178 of 67,048 inventorsTop 40%
Overall (2024): #227,694 of 561,600Top 45%
1
Patents 2024

Issued Patents 2024

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
12143288 Low-latency signaling-link retimer Casey Morrison, Enrique Musoll, Jitendra Mohan, Pulkit Khandelwal, Subbarao Arumilli +4 more 2024-11-12