MI

Marcus Van Ierssel

RA Rambus: 5 patents #17 of 161Top 15%
CS Cadence Design Systems: 2 patents #9 of 185Top 5%
Overall (2023): #15,732 of 537,848Top 3%
7
Patents 2023

Issued Patents 2023

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
11831323 Methods and circuits for reducing clock jitter Prabhnoor Singh Kainth, Nanyan Wang 2023-11-28
11804846 Phase-locked loop with phase information multiplication George Ng 2023-10-31
11742874 Matched digital-to-analog converters Ravi Shivnaraine 2023-08-29
11671286 Live offset cancellation of the decision feedback equalization data slicers Mohammad Sadegh Jalali 2023-06-06
11671108 Offset calibration for successive approximation register analog to digital converter Kenneth C. Dyer 2023-06-06
11601151 Pattern detection based parameter adaptation Nanyan Wang 2023-03-07
11569975 Baud-rate clock recovery lock point control 2023-01-31