Issued Patents 2023
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11842761 | Memory system with multiple open rows per bank | Thomas Vogelsang, John Eric Linstadt | 2023-12-12 |
| 11829307 | DRAM interface mode with interruptible internal transfer operation | Frederick A. Ware, Brent Haukness | 2023-11-28 |
| 11829308 | Flash memory device having a calibration mode | Pravin Kumar Venkatesan, Kashinath Prabhu, Makarand Ajit Shirasgaonkar | 2023-11-28 |
| 11803489 | Calibration protocol for command and address bus voltage reference in low-swing single-ended signaling | Pravin Kumar Venkatesan, Kashinath Prabhu, Makarand Ajit Shirasgaonkar | 2023-10-31 |
| 11782863 | Memory module with configurable command buffer | Ian Shaeffer, Yi Lu | 2023-10-10 |
| 11675657 | Energy-efficient error-correction-detection storage | Frederick A. Ware, John Eric Linstadt | 2023-06-13 |
| 11599483 | Dedicated cache-related block transfer in a memory system | — | 2023-03-07 |
| 11587605 | Command-triggered data clock distribution | Ian Shaeffer, Lei Luo | 2023-02-21 |