Issued Patents 2023
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11714607 | Adder circuit using lookup tables | Virantha Ekanayake | 2023-08-01 |
| 11681324 | Synchronous reset deassertion circuit | Namit Varma, Sarma Jonnavithula, Mohan Krishna Vedam, Virantha Ekanayake | 2023-06-20 |