Issued Patents 2022
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11527539 | Four-poly-pitch SRAM cell with backside metal tracks | Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim, Ping-Wei Wang, Ruey-Wen Chang | 2022-12-13 |
| 11495503 | Structure and process of integrated circuit having latch-up suppression | Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Hsin-Wen Su, Ping-Wei Wang | 2022-11-08 |
| 11450673 | Connection between source/drain and gate | Chih-Chuan Yang, Chia-Hao Pao, Yu-Kuan Lin, Ping-Wei Wang, Shih-Hao Lin | 2022-09-20 |
| 11444197 | Semiconductor device and method | Chih-Chuan Yang, Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim | 2022-09-13 |
| 11404426 | Controlling trap formation to improve memory window in one-time program devices | Hsin-Wen Su, Ping-Wei Wang, Yu-Kuan Lin, Shih-Hao Lin | 2022-08-02 |
| 11393831 | Optimized static random access memory | Ping-Wei Wang, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao +3 more | 2022-07-19 |
| 11367494 | Memory structure with doping-induced leakage paths | Hsin-Wen Su, Shih-Hao Lin, Jui-Lin Chen, Ping-Wei Wang | 2022-06-21 |
| 11348929 | Memory device and method for forming the same | Hsin-Wen Su, Chia-En Huang, Shih-Hao Lin, Ping-Wei Wang | 2022-05-31 |
| 11329042 | Gate structures having neutral zones to minimize metal gate boundary effects and methods of fabricating thereof | Chia-Hao Pao, Chih-Hsuan Chen, Shih-Hao Lin | 2022-05-10 |
| 11315933 | SRAM structure and method for forming the same | Ming-Chang Wen, Kuo-Hsiu Hsu, Jyun-Yu Tian, Wan-Yao Wu, Chang-Yun Chang +1 more | 2022-04-26 |
| 11296095 | Memory device and method for forming the same | Hsin-Wen Su, Yu-Kuan Lin, Shih-Hao Lin, Ping-Wei Wang | 2022-04-05 |
| 11257817 | Integrated chip with improved latch-up immunity | Hsin-Wen Su, Ping-Wei Wang, Wen-Chun Keng, Chih-Chuan Yang, Shih-Hao Lin | 2022-02-22 |