Issued Patents 2022
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532370 | Non-volatile memory with fast multi-level program verify | Xiang Yang, Huai-Yuan Tseng | 2022-12-20 |
| 11514991 | Program tail plane comparator for non-volatile memory structures | Fanqi Wu, Hua-Ling Cynthia Hsu, Huai-Yuan Tseng | 2022-11-29 |
| 11508450 | Dual time domain control for dynamic staggering | Yu-Chung Lien, Huai-Yuan Tseng | 2022-11-22 |
| 11481154 | Non-volatile memory with memory array between circuits | James Kai, Johann Alsmeier, Jian Chen | 2022-10-25 |
| 11475961 | Nonvolatile memory with efficient look-ahead read | Sujjatul Islam, Ravi Kumar | 2022-10-18 |
| 11456333 | Three-dimensional NAND memory device containing two terminal selector and methods of using and making thereof | Yu-Chung Lien, Jiahui Yuan, Christopher J. Petti | 2022-09-27 |
| 11437110 | Erase tail comparator scheme | Fanqi Wu, Huai-Yuan Tseng | 2022-09-06 |
| 11423993 | Bi-directional sensing in a memory | Zhiping Zhang, Muhammad Masuduzzaman, Huai-Yuan Tseng, Peng Zhang, Dengtao Zhao | 2022-08-23 |
| 11417400 | Controlling timing and ramp rate of program-inhibit voltage signal during programming to optimize peak current | Yu-Chung Lien, Huai-Yuan Tseng | 2022-08-16 |
| 11409443 | Intelligent memory wear leveling | Ravi Kumar, Niles Yang, Mark Shlick | 2022-08-09 |
| 11404127 | Read refresh to improve power on data retention for a non-volatile memory | Ravi Kumar, Vishwanath Basavaegowda Shanthakumar | 2022-08-02 |
| 11398280 | Lockout mode for reverse order read operation | Yu-Chung Lien, Huai-Yuan Tseng, Ravi Kumar | 2022-07-26 |
| 11385810 | Dynamic staggering for programming in nonvolatile memory | Yu-Chung Lien, Huai-Yuan Tseng | 2022-07-12 |
| 11361834 | Systems and methods for dual-pulse programming | Ravi Kumar | 2022-06-14 |
| 11342035 | Memory apparatus and method of operation using one pulse smart verify | Xue Bai Pitner, Ravi Kumar | 2022-05-24 |
| 11342033 | Look neighbor ahead for data recovery | Yi Song, Huai-Yuan Tseng | 2022-05-24 |
| 11335413 | Ramp rate control for peak and average current reduction of open blocks | Yu-Chung Lien, Huai-Yuan Tseng | 2022-05-17 |
| 11322213 | Enhanced multistate verify techniques in a memory device | Muhammad Masuduzzaman | 2022-05-03 |
| 11302409 | Programming techniques including an all string verify mode for single-level cells of a memory device | Xue Bai Pitner, Huai-Yuan Tseng, Ravi Kumar, Cynthia Hsu | 2022-04-12 |
| 11270776 | Countermeasure for reducing peak current during program operation under first read condition | Yu-Chung Lien, Huai-Yuan Tseng | 2022-03-08 |
| 11244735 | Systems and methods for program verification on a memory system | Zhiping Zhang, Huai-Yuan Tseng, Dengtao Zhao | 2022-02-08 |
| 11226772 | Peak power reduction management in non-volatile storage by delaying start times operations | Yu-Chung Lien, Mark Murin, Hua-Ling Cynthia Hsu, Tomer Eliash, Huai-Yuan Tseng | 2022-01-18 |