Issued Patents 2022
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11449404 | Built-in self-test for processor unit with combined memory and logic | Thomas A. Ziaja | 2022-09-20 |
| 11443822 | Method and circuit for row scannable latch array | Thomas A. Ziaja, Uma Durairajan | 2022-09-13 |
| 11443823 | Method and circuit for scan dump of latch array | Thomas A. Ziaja, Uma Durairajan | 2022-09-13 |
| 11428737 | Array of processor units with local BIST | Thomas A. Ziaja | 2022-08-30 |