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Word line decoder memory architecture |
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Memory device having electrically floating body transistor |
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NAND string utilizing floating body memory cell |
Jin-Woo Han, Yuniarto Widjaja |
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| 11386010 |
Circuit engine for managing memory meta-stability |
Neal Berger, Lester Crudele |
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Memory cell comprising first and second transistors and methods of operating |
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| 11342018 |
Systems and methods for reducing standby power in floating body memory devices |
Yuniarto Widjaja |
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| 11334288 |
MRAM access coordination systems and methods with a plurality of pipelines |
Neal Berger, Lester Crudele |
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| 11217300 |
Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers |
Yuniarto Widjaja, Zvi Or-Bach |
2022-01-04 |