Issued Patents 2022
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11537301 | High bandwidth memory system with distributed request broadcasting masters | Olivia Wu, Krishnakumar Narayanan Nair, Aravind Kalaiah, Anup Ramesh Kadkol, Pankaj Kansal | 2022-12-27 |
| 11537865 | Mapping convolution to a channel convolution engine | Krishnakumar Narayanan Nair, Rakesh Komuravelli, Ehsan Khish Ardestani Zadeh, Yuchen Hao, Martin Schatz +4 more | 2022-12-27 |
| 11531619 | High bandwidth memory system with crossbar switch for dynamically programmable distribution scheme | Olivia Wu, Krishnakumar Narayanan Nair, Aravind Kalaiah, Anup Ramesh Kadkol, Pankaj Kansal | 2022-12-20 |
| 11520854 | Support for different matrix multiplications by selecting adder tree intermediate results | Yuchen Hao, Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh, Rakesh Komuravelli, Thomas Mark Ulrich | 2022-12-06 |
| 11520853 | Mapping convolution to a partition channel convolution engine | Krishnakumar Narayanan Nair, Rakesh Komuravelli, Ehsan Khish Ardestani Zadeh, Yuchen Hao, Martin Schatz +4 more | 2022-12-06 |
| 11514306 | Static memory allocation in neural networks | Nadav Rotem, Mikhail Smelyanskiy, Jong Soo Park, Saleem Abdulrasool | 2022-11-29 |
| 11501147 | Systems and methods for handling padding regions in convolution operations | Krishnakumar Narayanan Nair, Ehsan Khish Ardestani, Martin Schatz, Yuchen Hao, Rakesh Komuravelli | 2022-11-15 |
| 11487888 | Systems and methods for protecting neural network weights | Nadav Rotem, Mikhail Smelyanskiy, Jong Soo Park, Roman Levenstein | 2022-11-01 |
| 11481471 | Mapping convolution to a matrix processor unit | Krishnakumar Narayanan Nair, Dheevatsa Mudigere, Olivia Wu, Ehsan Khish Ardestani Zadeh, Yuchen Hao | 2022-10-25 |
| 11468313 | Systems and methods for quantizing neural networks via periodic regularization functions | Maxim Naumov, Jong Soo Park, Benjamin Ray, Jedrzej Jablonski, Andrew John Tulloch | 2022-10-11 |
| 11443013 | Pipelined pointwise convolution using per-channel convolution operations | Rakesh Komuravelli, Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh, Yuchen Hao, Martin Schatz +4 more | 2022-09-13 |
| 11409838 | High throughput matrix processor with support for concurrently processing multiple matrices | Krishnakumar Narayanan Nair, Olivia Wu, Ehsan Khish Ardestani Zadeh, Thomas Mark Ulrich, Yuchen Hao +2 more | 2022-08-09 |
| 11275560 | Hardware for floating-point arithmetic in multiple formats | Thomas Mark Ulrich, Krishnakumar Narayanan Nair, Zhao-Jun Wang, Rakesh Komuravelli | 2022-03-15 |
| 11264011 | Systems and methods for employing predication in computational models | Nadav Rotem, Mikhail Smelyanskiy, Jong Soo Park, James Kenneth Reed | 2022-03-01 |
| 11256977 | Lowering hardware for neural networks | Mikhail Smelyanskiy, Jong Soo Park, Nadav Rotem | 2022-02-22 |