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FPGA specialist processing block for machine learning |
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FPGA specialist processing block for machine learning |
Dongdong Chen, Jason R. Bergendahl |
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Geometric synthesis |
Sergey Gribok, Gregg William Baeckler |
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Method and apparatus for performing multiplier regularization |
Sergey Gribok, Gregg William Baeckler |
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Prefix network-directed addition |
Bogdan Pasca, Sergey Gribok |
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Reduced latency multiplier circuitry for very large numbers |
Bogdan Pasca |
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Deterministic clustering and packing method for random logic on programmable integrated circuits |
Gregg William Baeckler |
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Floating-point dynamic range expansion |
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Circuitry for low-precision deep learning |
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Hyperbolic functions for machine learning acceleration |
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Integrated circuits with modular multiplication circuitry |
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Circuitry for high-bandwidth, low-latency machine learning |
Andrei-Mihai Hagiescu-Miriste |
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Method and apparatus for performing field programmable gate array packing with continuous carry chains |
Gregg William Baeckler |
2022-01-04 |