| 11487506 |
Condition code anticipator for hexadecimal floating point |
Silvia M. Mueller, Petra Leber, Kerstin Claudia Schelm |
2022-11-01 |
| 11360769 |
Decimal scale and convert and split to hexadecimal floating point instruction |
Eric M. Schwarz, Petra Leber, Kerstin Claudia Schelm, Silvia M. Mueller, Reid T. Copeland +1 more |
2022-06-14 |
| 11314512 |
Efficient checking of a condition code anticipator for a floating point processor and/or unit |
Petra Leber, Kerstin Claudia Schelm, Michael Klein |
2022-04-26 |
| 11269632 |
Data conversion to/from selected data type with implied rounding mode |
Laith M. AlBarakat, Jonathan D. Bradbury, Timothy J. Slegel, Joachim von Buttlar |
2022-03-08 |
| 11269651 |
Reusing adjacent SIMD unit for fast wide result generation |
Michael Klein, Nicol Hofmann, Osher Yifrach |
2022-03-08 |
| 11256511 |
Instruction scheduling during execution in a processor |
Stefan Payer, Kerstin Claudia Schelm, Anthony Saporito, Gregory W. Alexander |
2022-02-22 |
