Issued Patents 2022
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11539589 | Accelerated network reconnect using previous connection parameters | Yaniv Tzoreff, Gilboa Shveki, Barak Cherches | 2022-12-27 |
| 11514291 | Neural network processing element incorporating compute and local memory elements | Or Danon, Hadar Zeitlin, Daniel Ciubotariu, Rami Feig | 2022-11-29 |
| 11461615 | System and method of memory access of multi-dimensional data | Or Danon | 2022-10-04 |
| 11461614 | Data driven quantization optimization of weights and input data in an artificial neural network | Or Danon, Daniel Ciubotariu, Mark Grobman, Alex Finkelstein | 2022-10-04 |
| 11445437 | Methods and apparatus for efficient wakeup of wireless device | Oran Naftali, Yuval Jakira, Asaf Even-Chen | 2022-09-13 |
| 11354563 | Configurable and programmable sliding window based memory access in a neural network processor | Or Danon, Hadar Zeitlin, Daniel Ciubotariu, Rami Feig | 2022-06-07 |
| 11263512 | Neural network processor incorporating separate control and data fabric | Or Danon, Hadar Zeitlin, Daniel Ciubotariu, Rami Feig | 2022-03-01 |
| 11263077 | Neural network intermediate results safety mechanism in an artificial neural network processor | Roi Seznayov, Guy Kaminitz, Daniel Chibotero, Ori Katz, Amir Shmul +3 more | 2022-03-01 |
| 11238334 | System and method of input alignment for efficient vector operations in an artificial neural network | Or Danon, Daniel Ciubotariu | 2022-02-01 |
| 11238331 | System and method for augmenting an existing artificial neural network | Or Danon | 2022-02-01 |
| 11237894 | Layer control unit instruction addressing safety mechanism in an artificial neural network processor | Roi Seznayov, Daniel Chibotero, Ori Katz, Guy Kaminitz, Nir Engelberg +3 more | 2022-02-01 |
| 11221929 | Data stream fault detection mechanism in an artificial neural network processor | Ori Katz, Guy Kaminitz, Daniel Chibotero, Or Danon, Roi Seznayov +1 more | 2022-01-11 |
| 11216717 | Neural network processor incorporating multi-level hierarchical aggregated computing and memory elements | Or Danon, Hadar Zeitlin, Daniel Ciubotariu, Rami Feig | 2022-01-04 |