Issued Patents 2022
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11526650 | Switching power aware driver resizing by considering net activity in buffering algorithm | Yi-Xiao Ding, Jhih-Rong Gao | 2022-12-13 |
| 11520959 | Pruning of buffering candidates for improved efficiency of evaluation | Yi-Xiao Ding, Jhih-Rong Gao, Sheng-En David Lin | 2022-12-06 |
| 11514222 | Cell-width aware buffer insertion technique for narrow channels | Sheng-En David Lin, Yi-Xiao Ding, Jhih-Rong Gao | 2022-11-29 |
| 11461530 | Circuit design routing based on routing demand adjustment | Mateus Paiva Fogaça, Gracieli Posser, Wing-Kai Chow, Mehmet Can Yildiz | 2022-10-04 |
| 11354480 | Determining clock gates for decloning based on simulation and satisfiability solver | Matthew Eaton, Ji-Zheng Xu, George S. Taylor | 2022-06-07 |
| 11354479 | Post-CTS clock tree restructuring with ripple move | Andrew Mark Chapman | 2022-06-07 |
| 11347923 | Buffering algorithm with maximum cost constraint | Yi-Xiao Ding, Jhih-Rong Gao | 2022-05-31 |
| 11321514 | Macro clock latency computation in multiple iteration clock tree synthesis | Dirk Meyer, Ben Thomas Beaumont | 2022-05-03 |
| 11244099 | Machine-learning based prediction method for iterative clustering during clock tree synthesis | Bentian Jiang, Natarajan Viswanathan, Yi-Xiao Ding | 2022-02-08 |