| 11513802 |
Compressing micro-operations in scheduler entries in a processor |
Michael W. Boyer, Pritam Majumder |
2022-11-29 |
| 11513801 |
Controlling accesses to a branch prediction unit for sequences of fetch groups |
Adithya Yalavarti, Matthew R. Poremba |
2022-11-29 |
| 11509333 |
Masked fault detection for reliable low voltage cache operation |
Shrikanth Ganapathy |
2022-11-22 |
| 11487671 |
GPU cache management based on locality type detection |
Xianwei Zhang, Bradford M. Beckmann |
2022-11-01 |
| 11481331 |
Promoting prefetched data from a cache memory to registers in a processor |
Jagadish B. Kotra |
2022-10-25 |
| 11455252 |
Multi-class multi-label classification using clustered singular decision trees for hardware adaptation |
Paul Keltcher, Mayank Chhablani, Alok Garg, Furkan Eris |
2022-09-27 |
| 11442727 |
Controlling prediction functional blocks used by a branch predictor in a processor |
Varun Agrawal |
2022-09-13 |
| 11409608 |
Providing host-based error detection capabilities in a remote execution device |
Shrikanth Ganapathy, Ross V. La Fetra, Sudhanva Gurumurthi, Shaizeen Aga, Vilas Sridharan +2 more |
2022-08-09 |
| 11397691 |
Latency hiding for caches |
Apostolos Kokolis, Shrikanth Ganapathy |
2022-07-26 |
| 11309911 |
Semi-sorting compression with encoding and decoding tables |
Alexander D. Breslow, Nuwan Jayasena |
2022-04-19 |
| 11243884 |
Control flow guided lock address prefetch and filtering |
Susumu Mashimo |
2022-02-08 |