Issued Patents 2021
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11189721 | Trench gate trench field plate vertical MOSFET | Marie Denison, Guru Mathur | 2021-11-30 |
| 11177378 | HEMT having conduction barrier between drain fingertip and source | Jungwoo Joh, Naveen Tipirneni, Chang Soo Suh | 2021-11-16 |
| 11158750 | Superlattice photo detector | He Lin | 2021-10-26 |
| 11152459 | Lateral MOSFET with buried drain extension layer | Marie Denison, Philip L. Hower | 2021-10-19 |
| 11067620 | HEMT wafer probe current collapse screening | Dong Seup Lee, Jungwoo Joh, Pinghai Hao | 2021-07-20 |
| 11049960 | Gallium nitride (GaN) based transistor with multiple p-GaN blocks | Chang Soo Suh, Naveen Tipirneni, Jungwoo Joh | 2021-06-29 |
| 11004971 | LDMOS transistor with gate structure having alternating regions of wider and narrower spacing to a body region | Ming-Yeh Chuang | 2021-05-11 |
| 10964803 | Gallium nitride transistor with a doped region | Dong Seup Lee, Jungwoo Joh, Pinghai Hao | 2021-03-30 |
| 10957774 | Laterally diffused metal oxide semiconductor with gate poly contact within source window | Guru Mathur | 2021-03-23 |
| 10950720 | Electrostatic discharge guard ring with complementary drain extended devices | Sunglyong Kim, Seetharaman Sridhar, David LaFonteese | 2021-03-16 |
| 10937905 | Transistor having double isolation with one floating isolation | Yongxi Zhang, Philip L. Hower, John Lin, Guru Mathur, Scott Balster +1 more | 2021-03-02 |
| 10903320 | Transistor with source field plates and non-overlapping gate runner layers | Hiroyuki Tomomatsu, Hiroshi Yamasaki | 2021-01-26 |
| 10903306 | Integrated trench capacitor | Binghua Hu, Hideaki Kawahara | 2021-01-26 |
| 10896904 | ESD guard ring with snapback protection and lateral buried layers | Sunglyong Kim, David LaFonteese, Seetharaman Sridhar | 2021-01-19 |