Issued Patents 2021
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11010529 | Integrated circuit layout validation using machine learning | Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang | 2021-05-18 |
| 10909297 | Deterministic system for device layout optimization | Chin-Chang Hsu, Chien-Te Wu | 2021-02-02 |