| 11211105 |
Memory device comprising programmable command-and-address and/or data interfaces |
Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more |
2021-12-28 |
| 11184012 |
Detecting power supply noise events and initiating corrective action |
Jared L. Zerbe, Sanjay Pant |
2021-11-23 |
| 11181941 |
Using a stuttered clock signal to reduce self-induced voltage noise |
Jared L. Zerbe |
2021-11-23 |
| 11165613 |
High-speed signaling systems with adaptable pre-emphasis and equalization |
Jared L. Zerbe, Fred F. Chen, Andrew Ho, Ramin Farjad-Rad, John W. Poulton +2 more |
2021-11-02 |
| 11115247 |
Methods and circuits for asymmetric distribution of channel equalization between devices |
Jared L. Zerbe, Fariborz Assaderaghi, Hae-Chang Lee, Jihong Ren, Qi Lin |
2021-09-07 |
| 11063791 |
Receiver with clock recovery circuit and adaptive sample and equalizer timing |
Qi Lin, Hae-Chang Lee, Jihong Ren, Kyung Suk Oh, Jared L. Zerbe |
2021-07-13 |
| 11023403 |
Chip to chip interface with scalable bandwidth |
Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Pradeep Trivedi, Gin Yee +1 more |
2021-06-01 |
| 11022639 |
Integrated circuit that injects offsets into recovered clock to simulate presence of jitter in input signal |
Hae-Chang Lee, Jaeha Kim |
2021-06-01 |
| 10951218 |
Multi-mode clock multiplier |
Jared L. Zerbe, Masum Hossain |
2021-03-16 |
| 10938605 |
High-speed signaling systems and methods with adaptable, continuous-time equalization |
Hae-Chang Lee, Jade M. Kizer, Thomas Hastings Greer, III, Akash Bansal |
2021-03-02 |
| 10924124 |
Downshift techniques for oscillator with feedback loop |
Jared L. Zerbe, Sanjay Pant |
2021-02-16 |
| 10887076 |
Receiver with enhanced clock and data recovery |
Hae-Chang Lee, Jaeha Kim, Jafar Savoj |
2021-01-05 |
