| 11068272 |
Tracking and communication of direct/indirect source dependencies of producer instructions executed in a processor to source dependent consumer instructions to facilitate processor optimizations |
— |
2021-07-20 |
| 11061677 |
Recovering register mapping state of a flushed instruction employing a snapshot of another register mapping state and traversing reorder buffer (ROB) entries in a processor |
Kiran Ravi Seth, Yusuf Cagatay Tekmen, Rodney Wayne Smith, Shivam Priyadarshi |
2021-07-13 |
| 11061683 |
Limiting replay of load-based control independent (CI) instructions in speculative misprediction recovery in a processor |
Shivam Priyadarshi |
2021-07-13 |
| 11061824 |
Deferring cache state updates in a non-speculative cache memory in a processor-based system in response to a speculative data request until the speculative data request becomes non-speculative |
Arthur Perais, Rami Mohammad Al Sheikh, Shivam Priyadarshi |
2021-07-13 |
| 11036512 |
Systems and methods for processing instructions having wide immediate operands |
Arthur Perais, Rodney Wayne Smith, Shivam Priyadarshi, Rami Mohammad Al Sheikh |
2021-06-15 |
| 10929139 |
Providing predictive instruction dispatch throttling to prevent resource overflows in out-of-order processor (OOP)-based devices |
Lisa R. Hsu, Gregory M. Wright |
2021-02-23 |
| 10896041 |
Enabling early execution of move-immediate instructions having variable immediate value sizes in processor-based devices |
Shivam Priyadarshi, Arthur Perais, Yusuf Cagatay Tekmen, Rami Mohammad Al Sheikh, Rodney Wayne Smith |
2021-01-19 |
