| 11209986 |
Memory operations on data |
Paolo Amato, Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora |
2021-12-28 |
| 11194708 |
Data relocation in memory having two portions of data |
Paolo Amato |
2021-12-07 |
| 11183248 |
Timing parameter adjustment mechanisms |
Marco Sforzin |
2021-11-23 |
| 11132311 |
Interface for memory having a cache and multiple independent arrays |
Dionisio Minopoli, Gianfranco Ferrante, Antonino Caprì, Emanuele Confalonieri |
2021-09-28 |
| 11074192 |
Logical to physical table fragments |
Dionisio Minopoli |
2021-07-27 |
| 11055000 |
Apparatuses and methods for counter update operations |
Robert Nasry Hasbun |
2021-07-06 |
| 11036625 |
Host-resident translation layer write command associated with logical block to physical address of a memory device |
Dionisio Minopoli |
2021-06-15 |
| 10983727 |
Determination of data integrity based on sentinel cells |
Paolo Amato |
2021-04-20 |
| 10977198 |
Hybrid memory system interface |
Danilo Caraccio, Marco Dallabora, Paolo Amato, Luca Porzio |
2021-04-13 |
| 10956290 |
Memory management |
Marco Dallabora, Emanuele Confalonieri, Paolo Amato, Danilo Caraccio |
2021-03-23 |
| 10943659 |
Data state synchronization |
Marco Dallabora, Paolo Amato, Danilo Caraccio, Emanuele Confalonieri |
2021-03-09 |
| 10916324 |
Data state synchronization involving memory cells having an inverted data state written thereto |
Paolo Amato, Marco Dallabora, Danilo Caraccio, Emanuele Confalonieri |
2021-02-09 |
| 10884661 |
Command queuing |
Victor Y. Tsai, Danilo Caraccio, Neal A. Galbo, Robert Warren |
2021-01-05 |
