Issued Patents 2021
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11115176 | System and method for adjusting clock-data timing in a multi-lane data communication link | Chia Heng Chang | 2021-09-07 |
| 10965442 | Low-power, low-latency time-to-digital-converter-based serial link | Eskinder Hailu, Bupesh Pandita, Jon Boyette, Yong Suk Jun, Zhi Zhu +1 more | 2021-03-30 |