Issued Patents 2021
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11175948 | Grouping of tasks for distribution among processing entities | Seamus J. Burke, Louis A. Rasor | 2021-11-16 |
| 11157355 | Management of foreground and background processes in a storage controller | Matthew G. Borlick, Lokesh M. Gupta, Karl A. Nielsen | 2021-10-26 |
| 11157199 | Multi-mode address mapping management | Kevin J. Ash, Brian A. Rinaldi, Lokesh M. Gupta, Kyler A. Anderson | 2021-10-26 |
| 11150944 | Balancing mechanisms in ordered lists of dispatch queues in a computational device | Seamus J. Burke, Louis A. Rasor | 2021-10-19 |
| 11093399 | Selecting resources to make available in local queues for processors to use | Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta | 2021-08-17 |
| 11068418 | Determining memory access categories for tasks coded in a computer program | Matthew G. Borlick, Lokesh M. Gupta | 2021-07-20 |
| 11061784 | Monitoring correctable errors on a bus interface to determine whether to redirect input/output request (I/O) traffic to another bus interface | Matthew G. Borlick, Lokesh M. Gupta | 2021-07-13 |
| 11061818 | Recovering from write cache failures in servers | Todd C. Sorenson, Kevin J. Ash, Louis A. Rasor | 2021-07-13 |
| 11036635 | Selecting resources to make available in local queues for processors to use | Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta | 2021-06-15 |
| 11029998 | Grouping of tasks for distribution among processing entities | Seamus J. Burke, Louis A. Rasor | 2021-06-08 |
| 11003777 | Determining a frequency at which to execute trap code in an execution path of a process executing a program to generate a trap address range to detect potential malicious code | Lokesh M. Gupta, Matthew G. Borlick, Micah Robison | 2021-05-11 |
| 11003496 | Performance-based multi-mode task dispatching in a multi-processor core system for high temperature avoidance | Matthew G. Borlick, Lokesh M. Gupta | 2021-05-11 |
| 10996994 | Task queuing and dispatching mechanisms in a computational device | Seamus J. Burke, Louis A. Rasor | 2021-05-04 |
| 10956148 | Concurrent I/O enclosure firmware/field-programmable gate array (FPGA) update in a multi-node environment | Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch +3 more | 2021-03-23 |
| 10956354 | Detecting a type of storage adapter connected and miscabling of a microbay housing the storage adapter | Gary W. Batchelor, Enrique Q. Garcia, Jay T. Kirch, Todd C. Sorenson | 2021-03-23 |
| 10956322 | Storage drive dependent track removal in a cache for storage | Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta | 2021-03-23 |
| 10949277 | Monitoring correctable errors on a bus interface to determine whether to redirect input/output (I/O) traffic from a first processing unit to a second processing unit | Matthew G. Borlick, Lokesh M. Gupta | 2021-03-16 |
| 10950834 | Crushable cooling column for battery assembly in electric vehicle | Hangjie Liao, Waterloo Tsutsui, Thomas Siegmund, Weinong Wayne Chen | 2021-03-16 |
| 10936369 | Maintenance of local and global lists of task control blocks in a processor-specific manner for allocation to tasks | Sean P. Riley | 2021-03-02 |