Issued Patents 2021
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11025260 | Phase-locked loop (PLL) with multiple error determiners | Marco Zanuso, Rajagopalan Rangarajan, Yiwu Tang | 2021-06-01 |
| 10990117 | P-type metal-oxide-semiconductor (PMOS) low drop-out (LDO) regulator | Marco Zanuso, Rajagopalan Rangarajan, Yiwu Tang | 2021-04-27 |