Issued Patents 2021
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11145377 | Memory arrangement and method for operating or testing a memory arrangement | Friedrich Peter Leisenberger, Peter Sarson | 2021-10-12 |
| 10985767 | Phase-locked loop circuitry having low variation transconductance design | Jia Sheng Chen | 2021-04-20 |
| 10972111 | Phase-locked loop circuit | Jia Sheng Chen | 2021-04-06 |