{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2021", "item": "https://www.patentleaderboard.com/2021/"}, {"@type": "ListItem", "position": 3, "name": "AMD", "item": "https://www.patentleaderboard.com/2021/company/amd"}, {"@type": "ListItem", "position": 4, "name": "Shenghsun Cho", "item": "https://www.patentleaderboard.com/2021/inventor/fl:sh_ln:cho-38"}]}

Home › 2021 › AMD › Shenghsun Cho

Shenghsun Cho — 1 Patent in 2021

AMD: 1 patents #489 of 890Top 55%

Boxborough, MA: #33 of 72 inventorsTop 50%

Massachusetts: #4,998 of 14,123 inventorsTop 40%

Overall (2021): #265,220 of 548,734Top 50%

1 Patents 2021

Issued Patents 2021

Showing 1–1 of 1 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11023410	Instructions for performing multi-line memory accesses	David A. Roberts	2021-06-01	$332,544,000

Shenghsun Cho — 1 Patent in 2021

Issued Patents 2021

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