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Locality-aware and sharing-aware cache coherence for collections of processors |
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Near-memory data reduction |
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Fast thread wake-up through early lock release |
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Circuit board with phase change material |
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Protecting host memory from access by untrusted accelerators |
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Interconnect architecture for three-dimensional processing systems |
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Device and method for accelerating matrix multiply operations |
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Yi Xu, Yuan Xie |
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Device and method for accelerating matrix multiply operations as a sum of outer products |
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