Issued Patents 2021
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11190199 | Asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) timing adjustment based on output statistics | David A. Freitas, Hsung Jai Im | 2021-11-30 |
| 11177984 | CMOS analog circuits having a triode-based active load | Chuen Chou, Hsung Jai Im | 2021-11-16 |
| 11133963 | Dsp cancellation of track-and-hold induced ISI in ADC-based serial links | Ronan Casey | 2021-09-28 |
| 10998307 | CMOS analog circuits having a triode-based active load | Chuen Chou, Hsung Jai Im | 2021-05-04 |