Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10866280 | Scan chain self-testing of lockstep cores on reset | Nikita Naresh | 2020-12-15 |
| 10818374 | Testing read-only memory using memory built-in self-test controller | Nikita Naresh, Prathyusha Teja Inuganti, Rakesh Channabasappa Yaraduyathinahalli, Aravinda Acharya, Jasbir Singh +1 more | 2020-10-27 |
| 10776546 | False path timing exception handler circuit | Wilson Pradeep, Saket Jalan | 2020-09-15 |
| 10591540 | Compressed scan chains with three input mask gates and registers | Rubin Ajit Parekhji, Arvind Jain, Sundarrajan Subramanian | 2020-03-17 |
| 10579454 | Delay fault testing of pseudo static controls | Aravinda Acharya, Wilson Pradeep | 2020-03-03 |