Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10715158 | Phase-locked loop (PLL) with calibration circuit | Akarsh Joshi, Sharath Nadsar | 2020-07-14 |
| 10659214 | Multi-level clock and data recovery circuit | Ravi Mehta, Sanket Naik, Jayesh Wadekar | 2020-05-19 |
| 10608645 | Fast locking clock and data recovery circuit | Ravi Mehta | 2020-03-31 |