Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10691190 | Power delivery network analysis of memory unit I/O power domain | Pritesh Mahadev Pawaskar | 2020-06-23 |
| 10628803 | Dial home optimizer | Prakash Chanderia, Ajith Balakrishnan | 2020-04-21 |
| 10621387 | On-die decoupling capacitor area optimization | Rohit Halba, Shrikrishna Nana Mehetre | 2020-04-14 |
| 10594314 | Mitigation of simultaneous switching output effects | Hemant Kalidas Wadhavankar, Abhijit Anilkumar Jawkar | 2020-03-17 |
| 10585999 | Selection of die and package parasitic for IO power domain | Rohit Halba | 2020-03-10 |
| 10585817 | Method of signal integrity and power integrity analysis for address bus | Gaurav Mathur, Anant Dalimkar | 2020-03-10 |
| 10585996 | Die resistance-capacitance extraction and validation | — | 2020-03-10 |
| 10560116 | Probability-based optimization of system on chip (SOC) power | Rohit Halba, Shashi Kumar Shaw, Shrikrishna Nana Mehetre | 2020-02-11 |
| 10541020 | Controller architecture for reducing on-die capacitance | — | 2020-01-21 |