Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10819350 | Clock signal generating circuit and method for generating clock signal | Hsi-En Liu, You-Jyun Peng | 2020-10-27 |
| 10715359 | Decision feedback equalizer | Hsi-En Liu, Yi-Chun Hsieh | 2020-07-14 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10819350 | Clock signal generating circuit and method for generating clock signal | Hsi-En Liu, You-Jyun Peng | 2020-10-27 |
| 10715359 | Decision feedback equalizer | Hsi-En Liu, Yi-Chun Hsieh | 2020-07-14 |