NP

Nikolaos Papandreou

IBM: 10 patents #465 of 11,274Top 5%
Overall (2020): #8,734 of 565,922Top 2%
10
Patents 2020

Issued Patents 2020

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
10824352 Reducing unnecessary calibration of a memory unit for which the error count margin has been exceeded Nikolas Ioannou, Roman A. Pletka, Sasa Tomic 2020-11-03
10783024 Reducing block calibration overhead using read error triage Sasa Tomic, Timothy J. Fisher, Roman A. Pletka, Nikolas Ioannou, Charalampos Pozidis +1 more 2020-09-22
10732846 Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas +4 more 2020-08-04
10699791 Adaptive read voltage threshold calibration in non-volatile memory Roman A. Pletka, Sasa Tomic, Nikolas Ioannou, Charalampos Pozidis, Timothy J. Fisher +1 more 2020-06-30
10700702 Updating prefix codes for pseudo-dynamic data compression Charles J. Camp, Charalampos Pozidis, Roman A. Pletka, Thomas Mittelholzer, Thomas Parnell +1 more 2020-06-30
10656847 Mitigating asymmetric transient errors in non-volatile memory by proactive data relocation Roman A. Pletka, Sasa Tomic, Nikolas Ioannou, Aaron D. Fry, Timothy J. Fisher 2020-05-19
10658054 Methods for read threshold voltage shifting in non-volatile memory Nikolas Ioannou, Charalampos Pozidis, Roman A. Pletka, Sasa Tomic, Aaron D. Fry +1 more 2020-05-19
10614881 Calibration of open blocks in NAND flash memory Roman A. Pletka, Sasa Tomic, Nikolas Ioannou, Charalampos Pozidis, Aaron D. Fry +1 more 2020-04-07
10615824 Diagonal anti-diagonal memory structure Tobias Blaettler, Charles J. Camp, Thomas Mittelholzer, Thomas Parnell, Charalampos Pozidis 2020-04-07
10552063 Background mitigation reads in a non-volatile memory system Sasa Tomic, Roman A. Pletka, Nikolas Ioannou, Charalampos Pozidis, Aaron D. Fry +1 more 2020-02-04